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Segmented Architecture This drivers library comes in complement to the NanoScale distribution. It is intended to provide an easy yet powerful access to communication peripherals incorporated in the target processor. These drivers rely on NanoScale RTOS and on interruption mechanisms in order to provide a fully asynchronous programming interface.

I2C Controller

I2C stands for Inter-Integrated Circuit. It is a multi-master half-duplex serial bus used for attaching low-speed peripherals together on an electronic board. One peculiarity of I2C is that it is using only two bidirectional open-drain lines, pulled up with resistors: SDA and SCL.

UART Controller

UART stands for Universal Asynchronous Receiver/Transmitter. It is aimed to transmit bits from data bytes in a serial fashion. Signal adaptation to actual electrical lines is out of the scope of an UART. As a result, it is commonly used in conjunction with communication standards like RS-232, RS-422 or RS-485.

SPI Controller

SPI stands for Serial Peripheral Interface bus. It is a synchronous serial data link standard that operates in full duplex mode. The bus is under control of a single master that communicates with one or multiple slaves.

MAC Controller

MAC stands for Media Access Control. This layer provides addressing and channel access control mechanisms that allow different network hosts to communicate with each other through a shared medium. In the OSI model, this is a sub layer of the the Data Link layer (layer 2), which is responsible for transferring data between network entities. It also provides the means to detect and eventually correct errors that may occur in the physical layer.

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