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What is NanoScale[Features]DownloadPurchaseSupport

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NanoScale Features - Zero Latency

Zero Latency Interrupt latency is the time between an interrupt request and the execution of the first instruction of the Interrupt Service Routine. The interrupt latency is the result of different delays.

First the interrupt signal needs to be synchronized on the processor clock and wait the current instruction completion. Depending on the architecture, an instruction can take several cycles to complete.

The second delay is introduced by the RTOS itself. Indeed, an OS has to manage different data structures during its execution (e.g. tasks control blocks, etc.). In order to keep these data consistent, it is important to modify them atomically. One way to do this is to disable interrupts during such housekeeping operations. Of course, disabling interrupts contributes to longer latency.

A True Zero Latency RTOS like NanoScale provides enhanced mechanisms to allow ISR to interact with the kernel API while never disabling any interrupt. This is achieved through a segmented architecture that gives you the best of two worlds: it is possible to achieve very high interrupt rates without losing any interrupt, while interrupt handlers can still interact with most of the kernel features. As a result, an application built with NanoScale is both fast, predictable and flexible.

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